The present disclosure relates generally to data processing and, in particular, to a method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using I/O hub or chipset resources.
Recently, direct cache access (also referred to as cache injection) schemes have been developed. In addition, ‘receive message’ processing schemes have been developed to “pin” a receive message handler on a computer processing unit (CPU) so that cache locality is preserved. In a symmetrical multiprocessor (SMP) machine, cache injection transaction from an input/output (I/O) device requires a snoopy broadcast on the bus. Processor caches can snoop values and update caches; however, this is an expensive transaction considering that cache injection must execute concurrently with other operations like inter-processor communication and prefetching. In a non-uniform memory access (NUMA) machine, cache injection transactions require values to be broadcast to every processor in the NUMA domain, which consumes expensive interconnect bandwidth.
What is needed, therefore, is a way to inject I/O write values directly into a specific processor cache without requiring a broadcast to every processor cache in the hierarchy to reduce cache pollution and conserve processor complex interconnect bandwidth.